MSME
Date
18 Oct 2025
Seminar on “Analog Layout and Physical Design (VLSI)”
Date: 18th October 2025
Time: 9:00 AM – 12:30 PM
Venue: 3rd Floor Seminar Hall, ACSCE
The Department of Electronics and Communication Engineering, ACS College of Engineering, organized a seminar on “Analog Layout and Physical Design (VLSI)”.The session was conducted by Mr. K. Sanath Kumar, VLSI Trainer, VLSI Design & Embedded Systems.
The seminar provided valuable insights into VLSI Design concepts, Analog Layout Techniques, and Physical Design methodologies, enhancing students’ understanding of the core aspects of semiconductor design.
View Event Report
Time: 9:00 AM – 12:30 PM
Venue: 3rd Floor Seminar Hall, ACSCE
The Department of Electronics and Communication Engineering, ACS College of Engineering, organized a seminar on “Analog Layout and Physical Design (VLSI)”.The session was conducted by Mr. K. Sanath Kumar, VLSI Trainer, VLSI Design & Embedded Systems.
The seminar provided valuable insights into VLSI Design concepts, Analog Layout Techniques, and Physical Design methodologies, enhancing students’ understanding of the core aspects of semiconductor design.
View Event Report
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